Question from Computer Architecture – A quantitative approach by hennessy fifth ed, Appendix B, Page B-60, Q1.  You are trying to appreciate how important the principle oflocality is in justifying the use of a cache memory, so you experiment with acomputer having an L1 data cache and a main memory (you exclusively focus ondata accesses). The latencies (in CPU cycles) of the different kinds of accessesare as follows: cache hit, 1 cycle; cache miss, 105 cycles; main memory accesswith cache disabled, 100 cycles.a.  When you run a program with an overall miss rate of 5%, whatwill the average memory access time (in CPU cycles) be?b. Next, you run a program specifically designed to produce completely random data addresses with no locality. Toward that end, you use anarray of size 256 MB (all of it fits in the main memory). Accesses to randomelements of this array are continuously made (using a uniform random numbergenerator to generate the elements indices). If your data cache size is 64 KB,what will the average memory access time be?c. If you compare the result obtained in part (b) with the main memory access time when the cache is disabled, what can you conclude about therole of the principle of locality in justifying the use of cache memory?